In the field of integrated chip manufacturing, it is often useful to analyze potential chip package designs using finite element analysis. Finite element analysis consists of modeling a chip package and analyzing the model to determine the effects of physical and thermal stress on the package. Three-dimensional modeling is accomplished by first dividing the package into its separate parts and identifying from what material each part is manufactured. Each part is then divided into volumes, and the volumes are further subdivided into elements. Once the package has been meshed as a collection of small three-dimensional elements, the elements are used to conduct a finite element analysis of the package.
Two-dimensional modeling of a package is accomplished by taking a cross-section of the package and identifying the separate parts of the package in the cross-section. Each part is then subdivided into areas and those areas are further subdivided into elements. These elements comprise two-dimensional elements in contrast to the three-dimensional elements used with three-dimensional modeling. Similar to the three-dimensional analysis, the two-dimensional elements are used to conduct a finite element analysis of the package in two dimensions.
A finite element analysis processor takes each element of a modeled package and analyzes the effect of a boundary value field equation on it. Both two-dimensional and three-dimensional finite element analysis can analyze the effect of both physical and thermal stresses on the package. The result of a finite element analysis is to predict what the package will do when the package is constructed using the modeled structure.